cve-2024-42279
Vulnerability from cvelistv5
Published
2024-08-17 09:08
Modified
2025-05-04 09:25
Severity ?
Summary
spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
References
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927
Impacted products
LinuxLinux
LinuxLinux
Show details on NVD website

To clipboard 

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                "id": "CVE-2024-42279",
                "options": [
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                    "Exploitation": "none"
                  },
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                    "Automatable": "no"
                  },
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                    "Technical Impact": "partial"
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                "role": "CISA Coordinator",
                "timestamp": "2024-09-10T16:11:42.802690Z",
                "version": "2.0.3"
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          "orgId": "134c704f-9b21-4f2e-91b3-4a467353bcc0",
          "shortName": "CISA-ADP"
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        "title": "CISA ADP Vulnrichment"
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    "cna": {
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          "programFiles": [
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              "status": "unaffected",
              "version": "6.11",
              "versionType": "original_commit_for_fix"
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      "cpeApplicability": [
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      "descriptions": [
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          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer\n\nWhile transmitting with rx_len == 0, the RX FIFO is not going to be\nemptied in the interrupt handler. A subsequent transfer could then\nread crap from the previous transfer out of the RX FIFO into the\nstart RX buffer. The core provides a register that will empty the RX and\nTX FIFOs, so do that before each transfer."
        }
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      "title": "spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer",
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    "assignerShortName": "Linux",
    "cveId": "CVE-2024-42279",
    "datePublished": "2024-08-17T09:08:46.829Z",
    "dateReserved": "2024-07-30T07:40:12.261Z",
    "dateUpdated": "2025-05-04T09:25:48.623Z",
    "state": "PUBLISHED"
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    "nvd": "{\"cve\":{\"id\":\"CVE-2024-42279\",\"sourceIdentifier\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\",\"published\":\"2024-08-17T09:15:08.880\",\"lastModified\":\"2024-08-19T12:59:59.177\",\"vulnStatus\":\"Awaiting Analysis\",\"cveTags\":[],\"descriptions\":[{\"lang\":\"en\",\"value\":\"In the Linux kernel, the following vulnerability has been resolved:\\n\\nspi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer\\n\\nWhile transmitting with rx_len == 0, the RX FIFO is not going to be\\nemptied in the interrupt handler. A subsequent transfer could then\\nread crap from the previous transfer out of the RX FIFO into the\\nstart RX buffer. The core provides a register that will empty the RX and\\nTX FIFOs, so do that before each transfer.\"},{\"lang\":\"es\",\"value\":\"En el kernel de Linux, se ha resuelto la siguiente vulnerabilidad: spi: microchip-core: aseg\u00farese de que los FIFO de TX y RX est\u00e9n vac\u00edos al inicio de una transferencia. Mientras se transmite con rx_len == 0, el FIFO de RX no se vaciar\u00e1 en la interrupci\u00f3n entrenador de animales. Una transferencia posterior podr\u00eda leer basura de la transferencia anterior desde el RX FIFO al b\u00fafer de inicio de RX. El n\u00facleo proporciona un registro que vaciar\u00e1 los FIFO RX y TX, as\u00ed que h\u00e1galo antes de cada transferencia.\"}],\"metrics\":{},\"references\":[{\"url\":\"https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"}]}}"
  }
}


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